64-bit CPU

Sergey Kuznetsov tlug-9a/WvBvX2Qpg9hUCZPvPmw at public.gmane.org
Thu Sep 16 11:21:36 UTC 2004


Henry Spencer wrote:

>On Wed, 15 Sep 2004, Sergey Kuznetsov wrote:
>  
>
>>There is no any decrease in speed, because the bus also 64-bit, it means 
>>it can deliver 64-bits of data in one-two CPU clocks.
>>    
>>
>
>There's no connection between the CPU instruction/register width and the
>bus width, especially when there's a cache in between.  PC memory buses
>have been 64 bits wide since the Pentium I, and if I've understood the
>jargon correctly, today's systems with dual-channel DDR memory have
>effectively a 128-bit memory bus.
>
>  
>
       Okay then. It looks like my in-depth hardware knowledge has been 
frozen somewere in 1994 =)

All the Best!
Sergey.
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