[TLUG-ANNOUNCE]: GTALUG Meeting - Tuesday at 7:30pm - Cortex-M, For Type-A Developers with Trevor Woerner

Christopher Browne cbbrowne-Re5JQEeQqe8AvxtiuMwx3w at public.gmane.org
Wed Mar 12 16:01:58 UTC 2014

On Wed, Mar 12, 2014 at 10:11 AM, Lennart Sorensen <
lsorense-1wCw9BSqJbv44Nm34jS7GywD8/FfD2ys at public.gmane.org> wrote:

> On Mon, Mar 10, 2014 at 09:06:13AM -0400, Myles Braithwaite wrote:
> > # *Cortex-M, For Type-A Developers* with _Trevor Woerner_
> >
> > Coding, compiling, programming, and debugging Cortex-M devices in an
> > all-Linux development environment.
> Great presentation.
> Some of us were discussing what the Cortex-R chips could be comapred to
> the Cortex-M and Cortex-R.  So I went and looked.
> Apparently they have low latency interrupt handling to help real time,
> they have faster local memory, they are available with lock step redundant
> cores (so even if a core fails they can continue as if nothing happened),
> and they have ECC (error correction) on the busses and caches, and
> various other features to make them super reliable.
> Essentially they are for safety critical real time applications.
> So control systems and such.

I'd expect the R series to get used on disk controllers, and there's a
page at arm.com that supports this...


A lot of SSDs use an Indilinx controller <
http://techreport.com/review/23937/ocz-vector-ssd-reviewed> which likely
includes a Cortex-R.

Betcha a lot of hard drives have Cortex-R chips hiding on them somewhere...

That leads to an invisibly small number of vendors deploying nearly
unimaginably large numbers of them.  So it's a bit like insects; you
usually don't notice them, but they make up more of the mass of
the biosphere than everything else put together.
When confronted by a difficult problem, solve it by reducing it to the
question, "How would the Lone Ranger handle this?"
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