The Strange Birth and Long Life of Unix - IEEE Spectrum

James Knott james.knott-bJEeYj9oJeDQT0dZR+AlfA at public.gmane.org
Tue Dec 6 21:23:21 UTC 2011


D. Hugh Redelmeier wrote:
> | Actually, most CPUs can use memory mapped I/O.
>
> Not before the PDP-11.  My recollection is that it wasn't the first,
> but it made the idea popular.

Other computers had separate I/O instructions and signals on the bus.  
Since the PDP-11 didn't have those, it had to use memory mapped I/O.  
However, you could generally use memory mapped I/O on any CPU.

> | BTW, anyone else here remember the Data General I/O, where you could branch on
> | busy&  done flags?
>
> I never used one.
>
> It was rumoured that Edson de Castro, the designer of the Nova,
> actually designed it as the PDP-11 but DEC cancelled it and he started
> DG to build it.  It was definitely not as advanced as the PDP-11, more
> like a stretched PDP-8 (but different from the PDP-7/9/15 sequence).
>
> I think it is similar to the original ARM in a number of ways.
>
> The PDP-8 had no conditional branch instructions.  Instead, its
> conditional instructions conditionally skipped the next word
> (instruction) in the instruction stream.  This seems to be true of the
> Nova too.
I recall reading up on the PDP-8 instruction set.  IIRC, self modifying 
code was recommended!  This was to get around limitations of the 
instruction set.  The Nova had conditional jump relative instructions.  
It also had skip instructions, where you could skip over an instructions.

> If so, how could you have a one instruction conditional loop?
> Perhaps you meant a loop with one instruction in the body.

It's been *MANY* years since I've look at this, but you could do a "NO 
I/O" instruction, which would test the device status flags and then do a 
jump -1 on a specified status.  The jump -1 would put you back to the 
instruction again, so you'd keep on executing that one instruction until 
the status bit changed.

Here's a link to the Nova instruction set.
http://users.rcn.com/crfriend/museum/doco/DG/Nova/base-instr.html

IIRC, you'd do something like:

NIO SKPDN <device code>
JMP .-1

I guess it was 2 instructions, not one.  With the above, if the "Done" 
flag was set, you'd skip over the next instruction and execute whatever 
followed.  If it wasn't set, you'd jump back the NIO instruction and run 
it again.  However, IIRC, you could do a JMP .0, which would loop on 
that single instruction.  The "." made it a jump relative instruction.

One interesting feature the Nova had was auto increment and decrement 
memory locations.  If you did an indirect memory access, using the 
contents of those locations as the final address, the contents would 
increment (or decrement) so the next time you did that, you'd go to the 
next address.



--
The Toronto Linux Users Group.      Meetings: http://gtalug.org/
TLUG requests: Linux topics, No HTML, wrap text below 80 columns
How to UNSUBSCRIBE: http://gtalug.org/wiki/Mailing_lists





More information about the Legacy mailing list