The Strange Birth and Long Life of Unix - IEEE Spectrum

D. Hugh Redelmeier hugh-pmF8o41NoarQT0dZR+AlfA at public.gmane.org
Tue Dec 6 19:17:18 UTC 2011


| From: James Knott <james.knott-bJEeYj9oJeDQT0dZR+AlfA at public.gmane.org>

| D. Hugh Redelmeier wrote:
| > This is an interesting example of devices being addressed as if they
| > were memory, a noteable feature of the PDP-11.
| 
| Actually, most CPUs can use memory mapped I/O.

Not before the PDP-11.  My recollection is that it wasn't the first,
but it made the idea popular.

The PDP-11 was kind of like an Apple product: most computer architects
were inspired by it and copied it.  Even its mistakes.

I'm talking about device registers, not buffers.

|  DEC had the "feature" of not
| having any separate I/O instructions, which meant that I/O, not having it's
| own address space, occupied addresses that might otherwise be used for memory.
| I believe the Motorola mircroprocessors also did that.

Yes.  And of course the 6502 (an descendant of the 6800 architecture).

| BTW, anyone else here remember the Data General I/O, where you could branch on
| busy & done flags?

I never used one.

It was rumoured that Edson de Castro, the designer of the Nova,
actually designed it as the PDP-11 but DEC cancelled it and he started
DG to build it.  It was definitely not as advanced as the PDP-11, more
like a stretched PDP-8 (but different from the PDP-7/9/15 sequence).

I think it is similar to the original ARM in a number of ways.

The PDP-8 had no conditional branch instructions.  Instead, its
conditional instructions conditionally skipped the next word
(instruction) in the instruction stream.  This seems to be true of the
Nova too.

If so, how could you have a one instruction conditional loop?
Perhaps you meant a loop with one instruction in the body.

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