in Toronto this month: International Symposium on Code Generation and Optimization

D. Hugh Redelmeier hugh-pmF8o41NoarQT0dZR+AlfA at public.gmane.org
Tue Apr 6 19:48:05 UTC 2010


| From: Lennart Sorensen <lsorense-1wCw9BSqJbv44Nm34jS7GywD8/FfD2ys at public.gmane.org>

| The itanium I wasn't sure about.  Certainly avoiding all the complexity
| of out of order and speculative execution and all that seems reasonable.
| Having the compiler do the scheduling on the other hand was not something
| I had ever heard of being done.  I can't even imagine how a compiler
| would be able to do that in general (only in specific cases).  But being
| not a compiler designer I figured intel/HP must have some idea what they
| were getting into.  Well turns out they didn't know and apparently no
| one else seems to know how to make a compiler do it either.

Optimizing compilers can do surprising things.  VLIW compilation
techniques were not completely new when the Itanium project was
started.  In fact, a number of the folks at Intel/HP were refugees
from other projects like Multiflow and Cydrome.  I first heard of VLIW
technology from a headhunter (for Multiflow) about 25 years ago.

I've worked on optimizing compilers but I'm not up to date on what
they can do now.  I do know that results on benchmarks are not that
indicative of real-world performance.

The really tough stuff (i.e. what I don't understand) is how to deal
usefully with the memory hierarchy.  Especially without programmer
assistance.

I recently read a paper about the evolution of the BLAS library and
successors (Linear algebra kernels) to exploit high-performance system
architecture changes over the last 30 years.  Wow.  And that is from
the programmer's standpoint, not the compiler's.  For a well-suited
problem domain.

Multiflow did produce machines that were effective crunchers for a
point in time.  They were overwhelmed by the attack of the killer
micros.

(I don't think that the P4 miss-step was caused by the Itanium.  One
significant bit of evidence: x86 always got new semiconductor
fabrication processes well before Itanium (as far as I remember).
Concern for the Itanium did appear to cause Intel to hold back on
64-bit extensions to x86.)
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