OT: Looking for PC133 RAM
D. Hugh Redelmeier
hugh-pmF8o41NoarQT0dZR+AlfA at public.gmane.org
Wed May 28 20:19:05 UTC 2008
| From: Lennart Sorensen <lsorense-1wCw9BSqJbv44Nm34jS7GywD8/FfD2ys at public.gmane.org>
| Date: Tue, 8 Apr 2008 12:14:03 -0400
Reviving an old thread.
| On Tue, Apr 08, 2008 at 09:02:47AM -0400, Meng Cheah wrote:
| > Dell Dimension L800CXE :-)
|
| Well according to Crucial the meory support is:
|
| Up to 2 x 256MB PC133 unbuffered non-ecc
|
| 256MB sticks MUST be "double sided" which means they use two chip select
| lines per module. This normally means the module has 16 chips on it.
| If it has only 8 chips, it will almost certainly not work.
|
| 128MB modules can have just 8 chips and be fine.
|
| That is the limitation of the intel 810 chipset.
|
| My Athlon 700 (Via KT133 chipset) has a similar limit, except it can use
| single sided 256MB sticks, but must have double sided 512MB sticks and
| maxes out at 3 x 512MB ram.
I wish Crucial was that informative about the computer I'm trying to
upgrade.
I find it annoying that it is rarely made clear what is required for
PC100 / PC133 compatibility. I often heard "PC133 memory won't work
as a substitute for PC100" -- the answer is more complicated. Speed
should not be an issue but memory configuration can be.
The computer I'm playing with is a Dell Dimension XPS T450. It has a
BX chipset (old, for sure).
It came with a PC100 128M memory module.
It would not work with a PC133 256M module. It did not even recognize
the module (some systems recognize half of a module, but not this
time). That same module does work in a Dell Optiplex GX115 (i815
chipset).
Both modules have 8 RAM chips; both kinds of chips are 8 bits wide.
Thus each chip is active in each (64-bit) memory cycle; I think that
means that the modules are termed "single sided".
Chips on working module: Toshiba TC 59SM708FT-80
4M words x 8 bits x 4 banks
http://datasheet.digchip.com/487/487-13062-0-TC59SM704FT.pdf
Chips on failing module: Micron Technology MT48LC32M8A2-75
8M words x 8 bits x 4 banks
http://download.micron.com/pdf/datasheets/dram/sdram/256MSDRAM.pdf
One possibly relevant difference: the working chips 4k rows to be
refreshed every 64ms whereas the non-working ones have 8k rows to be
refreshed in the same period. On the other hand, if I read it
correctly, the BX chipset can refresh as many as 8k rows (assuming the
BIOS sets it up right).
http://download.intel.com/design/chipsets/datashts/29063301.pdf
Can anyone explain what actually are the parameters that matter in
PC100 and PC133 memory systems?
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