64-bit CPU

[jon.dmml-Re5JQEeQqe8AvxtiuMwx3w at public.gmane.org]

can you tell I know nothing


On Sat, 18 Sep 2004 17:16:38 -0400, James Knott <james.knott-bJEeYj9oJeDQT0dZR+AlfA at public.gmane.org> wrote:
> What's that got to do with ancient CPUs?  ;-)
> 
> 
> 
> 
> jon.dmml-Re5JQEeQqe8AvxtiuMwx3w at public.gmane.org wrote:
> > this might be a stupid question but... what is better? pentium 4 with
> > hyperthreading or AMD64?
> >
> >
> > On Sat, 18 Sep 2004 14:50:41 -0400, John Macdonald <john-Z7w/En0MP3xWk0Htik3J/w at public.gmane.org> wrote:
> >
> >>On Fri, Sep 17, 2004 at 08:14:38PM -0400, James Knott wrote:
> >>
> >>>John Macdonald wrote:
> >>>
> >>>
> >>>>I've got the "TMS Microprocessor Data Manual" on my bookshelf,
> >>>>it is dated November 1975.
> >>>>
> >>>
> >>>I think I had (have?) one of those too.  Back in the 70's, I had several
> >>>books on different CPUs. I seem to recall one, that used serial I/O for
> >>>everything, including memory.
> >>
> >>Using serial I/O to access memory is not the 9900.  It had
> >>a 16-bit data bus and a 15-bit address bus (it only used
> >>16-bit word reads and writes - I think it had to do a read/
> >>modify/write sequence to write a byte into memory).
> >>
> >>Serial I/O only interface sounds more like the microprocessors
> >>that were aimed at device controller purposes; which had a
> >>small amount of on-chip memory that was directly accessible
> >>and only I/O interfaces to off-chip resources.  There were lots
> >>of them that were variants of the 8-bit processors.  The point
> >>there was to not require a memory interface and memory chips,
> >>with the corresponding interface control lines and logic chips.
> >>That kept the chip count and cost down for a device controller.
> >>
> >>--
> >>
> >>
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> >
> >
> >
> >
> 
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Jonathan
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