64-bit CPU

[John Macdonald]

On Thu, Sep 16, 2004 at 10:24:30PM -0400, Henry Spencer wrote:
> On Thu, 16 Sep 2004, James Knott wrote:
> > Was it the old Texas Instruments CPU, used in the TI/99, that didn't 
> > have any on chip registers?  As I recall, the "registers" were in fact, 
> > reserved memory locations.
> 
> The processor was the TI 9900.  The memory wasn't exactly "reserved" --
> the block of 16 "registers" could be anywhere in memory, with a control
> register specifying where it was.  (Possibly it had to be on a 16-word
> boundary; I no longer remember.)
> 
> An interesting architecture, and although the initial implementation was
> understandably slow, you could throw more transistors at it to do things
> like caching, and TI was promising to do so.
> 
> But the marketing of the computer they designed around it, the 99/4A,
> could be described politely as grossly incompetent.  So they lost a bundle
> on the computer, and I think the chip got dragged down with it. 

There were 3 real registers.

PC - program counter
ST - status and interrupt
WP - workspace pointer

There were 16 virtual registers - WP + 2n was the address of reg
n (0..15).  WP had to be aligned on an even byte, but there was
no restriction about 16-word boundary.  It used 16-bit words,
so the address space was limited to 64k bytes or 32k words.
(30 years of Moore's Law is visible - nowadays we consider
64k bytes to be small for a level 1 cache, 30 years ago it
was acceptable as the maximum limit of the address space for a
small system (it was already too small for mainframes and was
becoming obvious that it was too small for minicomputers, but
for a micro-processor it was chosen as a tolerable limitation.

I've got the "TMS Microprocessor Data Manual" on my bookshelf,
it is dated November 1975.

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